This invention relates to overload protective circuits and, in particular, to semiconductor structures used to protect MOS circuits from voltage overloads.
One typically used voltage overload protection circuit is a resistor (RS) connected between an input terminal and the anode of a diode which is operated in reverse bias. The gate of an MOS structure which is to be protected from voltage overload is connected to the anode of the diode. The diode has an equivalent series resistor (RD). If a high voltage transient occurs at the input terminal, current flows through the RS and diode. As the voltage across the diode increases, a point is reached at which the diode operates in avalanche breakdown operation and the voltage there across is then essentially fixed at the breakdown voltage of the diode. The total voltage drop across the diode and RD, which determines the voltage applied to the MOS structure, is designed not to exceed the value known to damage the MOS structure to be protected.
A selection of a sufficiently high ratio of RS to RD serves to limit the voltage drop across RD. For example, assuming the diode has a breakdown potential of 35 volts and a 1200 volt surge hit the input, then the maximum voltage that can be developed across RD to insure that no more than 60 volts reaches the MOS structure to be protected is 25 volts. This requires that the ratio of RS to RD be 1200/25 or 48/1. One problem is that RD is typically approximately 100 ohms, requiring that RS be approximately 4800 ohms. Significantly, such a value of RS consumes significant amounts of silicon area.
It would be desirable to provide a relatively noncomplex semiconductor protection circuit which requires relatively little silicon area for implementation and which provides significantly greater breakdown protection than standard structures.